1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a method for aging a lot of semiconductor circuits in a wafer state, and measuring the electrical characteristics of each semiconductor circuit, and a semiconductor device for the same.
2. Description of the Related Art
Conventionally, when a semiconductor device composed of a plurality of semiconductor circuits is manufactured on a semiconductor wafer, the electrical characteristics of each of the semiconductor circuits are evaluated after a manufacturing process of the semiconductor device is complete. For this purpose, a test tool is used such that probes of the test tool are directly contacted with pads of each semiconductor circuit. Then, the electrical characteristics of the semiconductor circuit is evaluated. This process is called a probing.
Next, the semiconductor wafer is diced into semiconductor chips corresponding to the semiconductor circuits. Then, the semiconductor chips of good quality are selected in accordance with the evaluated electrical characteristics. Subsequently, the semiconductor chips of good quality are passed through a packaging process such as a die bonding process and a wire bonding process.
Next, the packaged semiconductor chips are put in a furnace in the state in which they are installed on a board and so on, and then a constant load is imposed. This process is called aging or a burn-in.
After the aging, the electrical characteristics are evaluated once again. Then, products in which initial failure occurred are excluded, and only good products are forwarded.
In this way, in the conventional manufacturing process of a semiconductor device, the aging is performed after the individual semiconductor chips are cut down from the semiconductor wafer. For this reason, whether or not the initial failure occurs in each semiconductor chip can not be determined before the dicing. The packaging process and the aging process are performed even to the semiconductor chips having the possibility that the initial failure occurs. Therefore, the material for the packaging process and the time for the aging process to the semiconductor chips in which the initial failure occurred are wasted, resulting in the product price being pushed up. For this reason, the demand is arisen to perform the aging process to the semiconductor device in a wafer state.
To solve the above problem, various methods are proposed. For example, as a first conventional method is proposed in which convex portions such as ball grids are provided for pads of each semiconductor chip corresponding to, for example, power supply pads V.sub.DD and V.sub.SS on a semiconductor wafer. After a film having patterns for connecting the convex portions is pasted onto the semiconductor wafer, the semiconductor wafer is put in a furnace in the state. In this manner, the aging process is performed in units of semiconductor wafers.
Also, as s second conventional method is proposed in which pads of each semiconductor chip are connected on the semiconductor wafer by wirings, and then aging is performed in a semiconductor wafer unit while voltage is externally applied to the pads.
However, in the first conventional method, it is difficult to provide the stable connection state between the convex portions on the film and the pads on the semiconductor chips for a long time under high temperature. Because a lot of semiconductor chips are connected in parallel and the connection state looks same, it is difficult to determine based on only the consumption current whether the connection state is good or not. As a result, it is difficult to determine the quality of the connection state from outside the furnace.
Also, in the second conventional method, the aging can be performed well. However, in case of the probing, the plurality of semiconductor chips out of the measurement object are also connected to the same power supply lines. For this reason, the characteristic evaluation on, especially, the current consumption is difficult. Also, there is a problem that a dicing blade hits the metal of the wiring pattern which connects between the pads so that the abrasion of the dicing blade is increased, while the dicing is performed. Further, there is another problem in that the diced end of wiring metal is exposed. For this reason, the corrosion of the wiring pattern metal progresses from the exposed end to the inside of the wiring pattern.